Magnetic memory chips cut the energy cost of on-device AI

Magnetic memory chips cut the energy cost of on-device AI

University of Texas engineers and TSMC tested SOT-MRAM that writes a bit in two nanoseconds using two picojoules and keeps data when power is off.

GP
Giulio Prisco
Sep 1, 2026
2 min read

Engineers at UR Austin worked with Taiwan Semiconductor Manufacturing Company to build and test SOT-MRAM (spin-orbit torque magnetoresistive random-access memory). It is a form of computer memory that stores each bit as a magnetic direction rather than as electric charge, so the data remain when the power is switched off.

The engineers said the mix of speed, low energy use, and endurance fits artificial intelligence (AI) work on devices that have little power and little memory.

They tried the chips on several AI jobs: neural network inference, training of binary neural networks, and probabilistic graph modeling.

A standard write, the switch of stored data between 0 and 1, took 2 nanoseconds and used 2 picojoules. Other memory technologies can take from five times as long to hundreds of times as long - sometimes several milliseconds - and can use hundreds of picojoules or more per write.

Why energy at the edge matters

AI and the data centers that run it are raising electricity demand in Texas and elsewhere. Texas is expected to host a large share of U.S. data centers, with a possible fivefold rise in statewide energy use. Two routes can shrink that footprint: make the hardware more efficient, and do more computing on small devices instead of in distant halls of servers. Better memory could help with both.

The engineers said SOT-MRAM accelerators could, with enough accuracy, replace CPU-based AI accelerators in edge devices such as sensors. They gave the example of a robotic hand that senses heat and decides locally, without sending every signal to a central “brain.” When very high accuracy is required, the robot could still reach GPU-based data centers in the cloud.

Next steps include refining the traits that give the chips their speed and efficiency and reducing variation from one device to another, which can lower neural-network accuracy.

This research is published in Science Advances.

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