EdgeCortix, a semiconductor company based in Japan, has announced a new AI hardware platform called RAIDEN that uses a chiplet architecture to scale computing power for physical AI applications. The platform is designed for what the company calls the thick edge, which refers to high-performance AI systems deployed outside central data centers, closer to sensors and machinery.
Scaling from one die to four
RAIDEN is built as a modular system that scales across three configurations: a single-die X1, a two-die X2, and a four-die X4 flagship. All three use the same DNA-X accelerator architecture and MERA software stack. A chiplet is a small, modular chip that can be combined with other chiplets to form a larger processor, allowing manufacturers to scale performance by adding more compute units rather than designing entirely new chips.
The flagship X4 configuration integrates four compute dies as a single system rather than as separate accelerators. According to EdgeCortix, this design delivers up to 3.36 petaflops of FP4 AI compute, 256 GB of memory, 548 GB per second of memory bandwidth, and up to 1.54 terabytes per second of die-to-die bandwidth. FP4 refers to a four-bit floating point number format that allows faster computation with lower memory usage compared to standard 32-bit formats, though with some loss of precision.
Physical AI systems differ from data-center AI in that they must process sensory input, make decisions, and control physical actions in real time, often under strict power and thermal constraints. EdgeCortix argues that simply adding more AI accelerators cannot solve the system-level problem of scaling these workloads, because compute, memory, bandwidth, connectivity, and software must all grow together.
The company states that RAIDEN is intended to reduce compromises that currently constrain advanced physical AI workloads, such as frequently moving models and data between internal and external memory, aggressively compressing model precision, splitting AI and non-AI tasks across different systems, and dividing a single physical AI pipeline across multiple discrete computers.
Why this matters: As robots, drones, autonomous vehicles, and industrial equipment increasingly run multimodal and generative AI models, they need hardware that can handle larger models and longer context windows within practical power limits. Existing edge AI chips often force tradeoffs between model size, latency, and energy consumption. A scalable chiplet architecture that preserves software investment across configurations could help physical AI systems evolve without requiring complete hardware redesigns. EdgeCortix reports that RAIDEN has already secured design wins with Kawasaki Heavy Industries for aerospace and defense applications, and with Unigen Corporation for edge server platforms.